Course Introduction

Basic digital system design involves the design of simple circuits using truth tables and Boolean Algebra/K-maps. Most modern digital circuits, however, are more complicated and require more powerful tools. Hardware Description Languages (HDLs), such as Verilog, are among these tools. We will use Verilog extensively in this course. In addition, there are architectural techniques that have been introduced which enhance the speed and capabilities of digital circuits. This course consists of hierarchical design of digital systems, circuit synthesis and simulation using the Verilog hardware description language and circuit implementation with field programmable gate arrays (FPGAs).

Course Expectations

You will be given an opportunity to learn modern digital system design methods (such as the use of Verilog and FPGA's). A complete understanding of modern methods also requires an understanding of digital fundamentals and traditional problem solving methods (such as truth tables and K-maps). At the conclusion of this course you should be able to: develop and evaluate complex combinational and sequential circuits, describe digital systems in Verilog HDL, Simulate and debug Verilog-based digital systems, synthesize Verilog designs and evaluate using the ARTIX 7 FPGA, analyze timing of digital systems.